Dynamic random-access memory (DRAM) is a type of random-access memory that stores each bit of data in a separate capacitor within an integrated circuit. Each capacitor can be either charged or discharged and these two states are generally taken to represent the two values of a bit, conventionally called 0 and 1. Since capacitors leak charge, any information stored via DRAM eventually fades unless each capacitor charge is “refreshed” periodically. Because of this refresh requirement, DRAM is considered dynamic as opposed to other types of static memory such as static random-access memory (SRAM).
The data storage units in a DRAM module are typically divided into banks and each bank is arranged into rows. When an address of the DRAM module is to be accessed (i.e., a read or write operation is performed), the entire row containing that address needs to be “activated” before the access and “precharged” after the access. Due to the leakage of electrons through the substrate of the DRAM module, this activate-precharge cycle to a row will cause its neighboring rows to gradually lose their charge. If a row is activated and precharged too many times before its neighboring rows are refreshed, the information stored on the neighboring rows may be corrupted or lost. This problem is also known as “row hammering.” Thus, there is a need for methods and systems to monitor and control repetitive accesses to a DRAM row.